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Arbeitsgruppe
Rekonfigurierbare Videosysteme
Projekt Morpheus
Morpheus ("multi-purpose dynamically reconfigurable platform for intensive heterogeneous processing", auf Deutsch: "vielseitig einsetzbare rekonfigurierbare Plattform für aufwändige heterogene Verarbeitungen") ist ein integriertes EU-weites Projekt, das sich mit innovativen Lösungen für eingebettete Systemen befasst, die auf dynamischen, rekonfigurierbaren Plattformen und Tools basieren.
Weitere Informationen befinden sich auf der Morpheus-Projektseite![[EXTERNAL]](/typo3temp/pics/external_link_68a9c27f33.gif "[EXTERNAL LINK]") (Englisch).
Das IDA beschäftigt sich im Rahmen dieses Projektes mit - Spezifikation der Anforderungen für Applikationen im Bereich Stream-Processing, insbesondere Echtzeitverarbeitung von digitalem hochauflösendem Video (Kino)
- Entwicklung und Integration eines Demonstrators auf Basis der im FlexFilm-Projekt entwickelten Hardware
- RTL-Design, sowie ein DDR-SDRAM Speichercontroller und eine externe Speicher-Schnittstelle und dazugehörige Simulationsmodele
- Tool-Design im Bereich der globalen Flusskontrolle
Verfügbare studentische Arbeiten
Projekt FlexFilm
Das FlexFilm-Projekt (2002-2005) befasste sich mit der Entwicklung von Systemen zur flexiblen Echtzeitverarbeitung von hochauflösendem Filmmaterial. Zusammen mit den Projektpartnern "Grass Valley Germany" und "TU Ilmenau" (Arbeitsgruppe "Digitale Bild- und Videoverarbeitung (pvk)") wurde - ein Grundkonzept für eine FPGA-basierte, skalierbare Rechnerplattform entwickelt und anschließend als PCI-Express-Erweiterungskarte für PCs umgesetzt,
- Entwurfsmethodiken und Modulbibliotheken für die Firmware konzipiert sowie
- eine Beispielapplikation zur hochqualitativen Rauschunterdrückung entwickelt, die wegen ihrer Komplexität (200 Gops/s) nur auf der FlexFilm-Hardware lauffähig ist
Weitere Informationen befinden sich auf der FlexFilm-Projektseite
Beteiligte am IDA
| Sean Whitty, Henning Sahlbach, Brady Hurlburt, Wolfram Putzke-Röming, und Rolf Ernst, "Application-specific Memory Performance of a Heterogeneous Reconfigurable Architecture," in Proc. of Design, Automation and Test in Europe (DATE), (Dresden, Germany), March 2010 |  | | | | @inproceedings{WHP+10:AppliMemorPerfoHeter, ADDRESS = "Dresden, Germany",
AUTHOR = "Sean Whitty and Henning Sahlbach and Brady Hurlburt and Wolfram Putzke-Röming and Rolf Ernst",
BOOKTITLE = "Proc. of Design, Automation and Test in Europe (DATE)",
MONTH = "March",
TITLE = "Application-specific Memory Performance of a Heterogeneous Reconfigurable Architecture",
YEAR = "2010",
} | | Amilcar do Carmo Lucas, Henning Sahlbach, Sean Whitty, Sven Heithecker, und Rolf Ernst, "Application Development with the FlexWAFE Realtime Stream Processing Architecture for FPGAs," ACM Transactions on Embedded Computing Systems Special Issue on Configurable Computing: Configuring Algorithms, Processes and Architecture, vol. 9, No. 1, October 2009 | | | | | @article{LSH+09:AppliDevelFlexWRealt, AUTHOR = "Amilcar do Carmo Lucas and Henning Sahlbach and Sean Whitty and Sven Heithecker and Rolf Ernst",
JOURNAL = "ACM Transactions on Embedded Computing Systems Special Issue on Configurable Computing: Configuring Algorithms, Processes and Architecture",
MONTH = "October",
NUMBER = "1",
TITLE = "Application Development with the FlexWAFE Realtime Stream Processing Architecture for FPGAs",
VOLUME = "9",
YEAR = "2009",
} | | Sean Whitty, Henning Sahlbach, Wolfram Putzke-Röming, und Rolf Ernst, "Mapping of a Film Grain Removal Algorithm to a Heterogeneous Reconfigurable Architecture," in Proc. of Design, Automation and Test in Europe (DATE), (Nice, France), April 2009 | | | | | @inproceedings{WSP+09:MappiGrainRemovAlgor, ADDRESS = "Nice, France",
AUTHOR = "Sean Whitty and Henning Sahlbach and Wolfram Putzke-Röming and Rolf Ernst",
BOOKTITLE = "Proc. of Design, Automation and Test in Europe (DATE)",
MONTH = "April",
TITLE = "Mapping of a Film Grain Removal Algorithm to a Heterogeneous Reconfigurable Architecture",
YEAR = "2009",
} | | Sean Whitty and Rolf Ernst, "A Bandwidth Optimized SDRAM Controller for the MORPHEUS Reconfigurable Architecture," in Proc. of the International Parallel and Distributed Processing Symposium (IPDPS), (Miami, FL), April 2008 | | | | | @inproceedings{WE08:BandwOptimSDRAMContr, ADDRESS = "Miami, FL",
AUTHOR = "Sean Whitty and Rolf Ernst",
BOOKTITLE = "Proc. of the International Parallel and Distributed Processing Symposium (IPDPS)",
MONTH = "April",
TITLE = "A Bandwidth Optimized SDRAM Controller for the MORPHEUS Reconfigurable Architecture",
YEAR = "2008",
} | | Sean Whitty, Morpheus DDR SDRAM Controller Documentation. IDA, Braunschweig, Germany, November 2007 | | | | | @manual{Whi07:MorphSDRAMContrDocum, ADDRESS = "Braunschweig, Germany",
AUTHOR = "Sean Whitty",
INSTITUTION = "Institute for Computer and Communication Network Engineering",
MONTH = "November",
NUMBER = "IDA-2007-11",
ORGANIZATION = "IDA",
TITLE = "Morpheus DDR SDRAM Controller Documentation",
TYPE = "Technical Report",
YEAR = "2007",
} | | Amilcar do Carmo Lucas, Sven Heithecker, und Rolf Ernst, "FlexWAFE - A high-end real-time stream processing library for FPGAs," in Proceedings of the 44th annual conference on Design Automation (DAC), (San Diego, California), pp. 916-921, June 2007 | | |  | | @inproceedings{LHE07:FlexWhigherealtstrea, ADDRESS = "San Diego, California",
AUTHOR = "Amilcar do Carmo Lucas and Sven Heithecker and Rolf Ernst",
BOOKTITLE = "Proceedings of the 44th annual conference on Design Automation (DAC)",
MONTH = "June",
PAGES = "916--921",
TITLE = "FlexWAFE - A high-end real-time stream processing library for FPGAs",
YEAR = "2007",
} | | Sven Heithecker, Amilcar do Carmo Lucas, Rolf Ernst, "A High-End Real-Time Digital Film Processing Reconfigurable Platform," EURASIP Journal on Embedded Systems, Special Issue on Dynamically Reconfigurable Architectures, vol. 2007, pp. Article ID 85318, 2007 | | | | | @article{heithecker:eurasip07, AUTHOR = "Sven Heithecker, Amilcar do Carmo Lucas, Rolf Ernst",
JOURNAL = "EURASIP Journal on Embedded Systems, Special Issue on Dynamically Reconfigurable Architectures",
PAGES = "Article ID 85318",
TITLE = "A High-End Real-Time Digital Film Processing Reconfigurable Platform",
VOLUME = "2007",
YEAR = "2007",
} | | Sven Heithecker, Amilcar do Carmo Lucas, und Rolf Ernst, "FlexFilm - an Image Processor for Digital Film Processing," in Dynamically Reconfigurable Architectures (P. M. Athanas, J. Becker, G. Brebner, J. Teich, Ed.), No. 06141 of series Dagstuhl Seminar Proceedings, April 2006 | | | | | @inproceedings{HLA06:FlexFImageProceDigit, AUTHOR = "Sven Heithecker and Amilcar do Carmo Lucas and Rolf Ernst",
BOOKTITLE = "Dynamically Reconfigurable Architectures",
EDITOR = "P. M. Athanas, J. Becker, G. Brebner, J. Teich",
MONTH = "April",
NUMBER = "06141",
SERIES = "Dagstuhl Seminar Proceedings",
TITLE = "FlexFilm - an Image Processor for Digital Film Processing",
YEAR = "2006",
} | | Amilcar do Carmo Lucas, Sven Heithecker, Peter Rüffer, Rolf Ernst, Holger Rückert, Gerhard Wischermann, Karin Gebel, Reinhard Fach, Wolfgang Huther, Stefan Eichner, Gunter Scheller, "A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications," in DATE, pp. 194-199, IEEE Computer Society, March 2006 | | | | | @inproceedings{Luc06:reconplatfcompuinten, AUTHOR = "Amilcar do Carmo Lucas, Sven Heithecker, Peter Rüffer, Rolf Ernst, Holger Rückert, Gerhard Wischermann, Karin Gebel, Reinhard Fach, Wolfgang Huther, Stefan Eichner, Gunter Scheller",
BOOKTITLE = "DATE",
MONTH = "March",
PAGES = "194--199",
PUBLISHER = "IEEE Computer Society",
TITLE = "A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications",
YEAR = "2006",
} | | Amilcar do Carmo Lucas and Rolf Ernst, "An Image Processor for Digital Film," in IEEE Application-Specific Systems, Architectures, and Processors (ASAP 2005), pp. 219--224, IEEE computer Society, July 2005 | | | | | @inproceedings{LE05:ImageProceDigitFilm, AUTHOR = "Amilcar do Carmo Lucas and Rolf Ernst",
BOOKTITLE = "IEEE Application-Specific Systems, Architectures, and Processors (ASAP 2005)",
MONTH = "July",
PAGES = "219--224",
PUBLISHER = "IEEE computer Society",
TITLE = "An Image Processor for Digital Film",
YEAR = "2005",
} | Sven Heithecker, Rolf Ernst, "Traffic Shaping for an FPGA based SDRAM Controller withComplex QoS Requirements," in 42nd Design Automation Conference (DAC), pp. 34.5, ACM, IEE, ACM, June 2005
IDA-Signatur: heithecker:dac05 | | | | | @inproceedings{Hei05:TraffShapibasedSDRAM, AUTHOR = "Sven Heithecker, Rolf Ernst",
BOOKTITLE = "42nd Design Automation Conference (DAC)",
MONTH = "June",
ORGANIZATION = "ACM, IEE",
PAGES = "34.5",
PUBLISHER = "ACM",
TITLE = "Traffic Shaping for an FPGA based SDRAM Controller withComplex QoS Requirements",
YEAR = "2005",
} | | Sven Heithecker, Amilcar d.C. Lucas, Rolf Ernst, "A Mixed QOS SDRAM Controller for FPGA-Based High-End Image Processing," in IEEE Workshop on Signal Processing Systems Design and Implementation, pp. TP.11, IEEE, IEEE, 2003 | | | | | @inproceedings{Sve03:MixedQOS_SDRAM_Contr, AUTHOR = "Sven Heithecker, Amilcar d.C. Lucas, Rolf Ernst",
BOOKTITLE = "IEEE Workshop on Signal Processing Systems Design and Implementation",
ORGANIZATION = "IEEE",
PAGES = "TP.11",
PUBLISHER = "IEEE",
TITLE = "A Mixed QOS SDRAM Controller for FPGA-Based High-End Image Processing",
YEAR = "2003",
} |
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