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Alexander Dörflinger
 
Room: 1307
Phone: +49 531 391 9680
Telefax: +49 531 391 4587
E-Mail:
 
Institute of Computer and Network Engineering
Hans-Sommer-Street 66
38106 Braunschweig

Forschung

  • Controlling Concurrent Change (http://ccc-project.org):
    • Subproject B3: Safety and Availability
    • Subproject C1: Aerospace Electronics
  • Data Processing Units (DPUs) for spacecrafts

Lehre

Publikationen

The material provided below is copyrighted. Readers are obliged to abide the corresponding copyrights.

Björn Fiethe, Alexander Dörflinger, and Harald Michalik, "Efficient Image Data Processing for the JANUS Instrument on JUICE" in Eurospace DASIA 2019, 2019, (to appear).Show BibTeX code: Efficient Image Data Processing for the JANUS Instrument on JUICE    
Alexander Dörflinger, Mark Albers, Björn Fiethe, Harald Michalik, Mischa Möstl, Johannes Schlatow, and Rolf Ernst, "Demonstrating Controlled Change for Autonomous Space Vehicles" in NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2019. Show BibTeX code: Demonstrating Controlled Change for Autonomous Space Vehicles    
Mischa Möstl, Alexander Dörflinger, Mark Albers, Harald Michalik, and Rolf Ernst, "Self-Adaptation for Availability in CPU-FPGA Systems under Soft Errors" in NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2019. Show BibTeX code: Self-Adaptation for Availability in CPU-FPGA Systems under Soft Errors    
Alexander Dörflinger, Mark Albers, Johannes Schlatow, Björn Fiethe, Harald Michalik, Phillip Keldenich, and Sándor P. Fekete, "Hardware and Software Task Scheduling for ARM-FPGA Platforms" in NASA/ESA Conference on Adaptive Hardware and Systems (AHS), (Edinburgh, UK), August 2018. Show BibTeX code: Hardware and Software Task Scheduling for ARM-FPGA Platforms    
Alexander Dörflinger, Mark Albers, Björn Fiethe, and Harald Michalik, "Hardware Acceleration in Genode OS Using Dynamic Partial Reconfiguration" in Architecture of Computing Systems -- ARCS, 2018. Show BibTeX code: Hardware Acceleration in Genode OS Using Dynamic Partial Reconfiguration    
A. Dörflinger, B. Fiethe, H. Michalik, S. P. Fekete, P. Keldenich, and C. Scheffer, "Resource-efficient dynamic partial reconfiguration on FPGAs for space instruments" in NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2017. Show BibTeX code: Resource-efficient dynamic partial reconfiguration on FPGAs for space instruments    
H. Michel, H. Guzmán-Miranda, A. Dörflinger, H. Michalik, and M. A. Echanove, "SEU fault classification by fault injection for an FPGA in the space instrument SOPHI" in NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2017. Show BibTeX code: SEU fault classification by fault injection for an FPGA in the space instrument SOPHI    
Address:
Hans-Sommer-Street 66
38106 Braunschweig

Fon: +49 (0)531 391-3734
Fax: +49 (0)531 391-4587
sekretariat(at)ida.ing.tu-bs.de

Address of Prof. Jukan's workgroup:

Hans-Sommer-Street 66
38106 Braunschweig

Fon: +49 (0)531 391-5286
Fax: +49 (0)531 391-5296