Caused by continously technology scaling in semiconductor cicuits reliability of modern microprocessors becomes more and more an important design issue. Manufacturing processes converging to physical limitations lead to increasing number of bugs during production of a chip.
Furthermore semiconductor structures smaller than 64 nm implicate transistors with less the 100 dopant atoms per channel. Such a small number of dopant atoms makes it impossible to produce transistors with totally deterministic behaviour. Instead random effects are ocurring, which lead to variations in threshold voltage or leakage.
In the scope of the AIS project several measures will be explored to counteract these kind of problems. Therefore the classical MpSoC design will be enhanced by an autonomous layer. This layer, which will be integrated directly on chip, contains elements responsible for detection and correction of errors resulting from the effects described above. Further on software techniques will be developed to analyze the timing behaviour of autonomous systems and to provide autonomous operating system functionality.
More detailled information about the AIS project can be found here.
The main research focus of the Institute of Computer and Network Engineering within the AIS project consists in studying the real time probabilities of autonomous systems. For this purpose we will enhance the performance analysis tool SymTA/S to take error occurence and error correction into account during system level timing analysis.
The major challenges within the project are:
The results can finally be used to derive measures to optimze the system behaviour due to error occurence. For example, a marginal reduction of processor's clock frequency may result in a signifant reduction of error rates. In this case, the overall chip performance may be improved despite to lower clock frequencies.